Highlights

• MOS Technology^® 6502 compliant
• Control Unit with both maskable and non-maskable interrupts
• 8-bit Instruction Decoder with 56 instructions and 151 opcodes
• 8-bit ALU for decimal and binary arithmetic as well as logical/logical shift operations
• External Memory interface addressing up to 64KB of memory by 13 addressing modes

Benefits

• 6502 architecture popularity results in a large variety of industry-certified software ready to be used with the core
• Obsolete IP cores, on contrary to original chips, can be easily integrated in more advanced SoC designs targeted to FPGAs or ASICs
• Possibility to modify the instruction list according to customer’s application

• 8-bit data processing applications
• Low power consumption applications

• High speed control systems
• Microcomputer systems

Deliverables

• VDHL/Verilog source code
• Synthesis support for Synopsys® tools with a set of synthesis scripts
• Simulation support for Mentor Graphics® and Cadence® tools with a set of scripts and macros
  
• Extensive VHDL/Verilog 2001 test bench
• Documentation
• A collection of 6502 assembler programs which are executed directly by the test bench
• 30 days of technical support 
• 90 days of warranty against defects

Delivery Options

• EDIF netlist for FPGA and low volume production
• Evaluation system for proprietary EB5-Tiny board
• One-year maintenance
• On-site support and training