SLIMBUS-FRM - MIPI® SLIMbus Framer Controller

The SLIMBUS-FRM is a MIPI® compliant SLIMbus Framer. It implements Interface Device Class and Framer Device Class with a programmable set of supported clock frequencies.

The component has a highly configurable and scalable modular architecture that enables seamless adoption to any user application. The SLIMBUS-FRM has been developed as a synchronous, latch-free design.

The component fully supports even most advanced MIPI® SLIMbus features, which include dynamic bus reconfiguration and framer handover. Furthermore, it implements all Core, Interface and Framer Information Elements and supports automatic transmission of reply and report messages.

  • Highlights
  • Benefits
  • Applications
  • Deliverables
  • Compliant to MIPI®SLIMbus®version 1.01.01
  • Full support for:
  • All core messages
  • Bus reconfiguration (change of Clock Frequency, Gear, and Subframe mode)
  • Bus pause, reset and shutdown
  • Framer handover
  • Request and Clear Information
  • Automatic transmission of reply and report messages
  • Implemented all mandatory and optional Core, Interface and Framer Information Elements
  • Full solution - no external microcontroller required
  • Configurability using generic parameters
  • Enumeration Addresses of Interface and Framer
  • Size of queue for messages to be transmitted
  • Configurability using pin strapping
  • Primary framer select
  • Clock Root Frequencies supported by the Framer
  • Maximum number of automatic retransmissions
  • HD, DCI 2K image resolutions support
  • Better image quality for lower bit-rates when compared to the JPEG standard, especially for HD and DCI 2K resolutions
  • Excellent performance to size ratio
  • Both lossless and lossy compression modes implemented
  • Customizable design: ASIC, Xilinx Virtex-5 and Virtex-6, Altera Stratix III and Stratix IV FPGAs
  • Digital still cameras and camcorders
  • Video mastering, archiving and acquisition
  • Post-production
  • Digital cinema systems
  • Video and imaging distribution systems
  • 3G mobile networks
  • Digital CCTV and security systems
  • Satellite imaging

Deliverables

  • VHDL source code
  • Synthesis support for Synopsys® and Cadence tools with a set of synthesis scripts 
  • Simulation support for Mentor Graphics® and Cadence® tools with a set of scripts and macros 
  • Extensive VHDL test bench
  • Documentation
  • 30 days of technical support 
  • 90 days of warranty against defects

Delivery Options

  • EDIF netlist for FPGA and low volume production
  • Verilog source code
  • One-year maintenance
  • On-site support and training

Downloads

Related Products

SLIMBUS-DEV – implements Interface Device Class and Generic Device Class with up to 64 programmable data ports. Full compliance with the MIPI SLIMbus specification enables user to enjoy all benefits of the SLIMbus standard, which include dynamic bus reconfiguration, multiple simultaneous independent data transmissions and power consumption optimization.

SLIMBUS-MGR – implements Interface Device Class and the Manager Device Class. Thanks to an OCP interface and a rich set of wrappers, the Manager Controller can be easily interfaced to every system bus standard. It supports most advanced MIPI® SLIMbus features, which include dynamic bus reconfiguration and power consumption optimization.

SLIMBUS-MGR-DPORT – extends the Manager Controller with DMA interface and ability to transfer and process multiple simultaneous data streams independently.

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