T8051 - The World's Smallest 8051 MCU IP Core

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The T8051 the world’s smallest 8051 IP core of a microcontroller which executes ASM51 instruction set. It provides an interface for serial communication, timer, multi-purpose I/O ports, hardware interrupts and debugger interface.

The T8051 design bases on another well-proven Evatronix’ product - the R8051XC, however, the T8051 architecture is designed to achieve a very low gate count. To meet this requirement, a wide range of resources is effectively shared between several stages of instruction execution inside the CPU.

The gate count is the trump card of the T8051 – there is no 8051-compatible microcontroller on the market that would even come close to the achieved values. Target applications for the T8051 are those in which the microcontroller replaces hard-coded control logic, being easy re-programmable and allowing modifications to the control algorithm without the need to re-design the chip. An implemented complex debugging system is an additional value.

  • Highlights & Benefits
  • Configurability
  • Applications
  • Deliverables

Highlights

  • The smallest 8051 IP core in the market
  • External Memory Interface that addresses up to 64 kB of external Program and Data Memory
  • Power Management Unit with power-down modes (IDLE/STOP)
  • Native On-Chip Debug Support (OCDS) interface
  • 80C51-like Timer 0

Benefits

  • The lowest gate count 8051-compliant architecture
  • Low power consumption
  • Relatively high performance
  • Complete debugging solution compatible with other Evatronix 8051 products
  • Removal of selected components available for even lower gate count
  • On-demand customization
  • User can manually replace selected peripherals and/or OCDS block with provided dummy replacements.
  • Mixed-signal systems
  • Low-speed and low-power control systems
  • Small FPGA-based systems

Deliverables

  • VHDL/Verilog source code 
  • Synthesis support for Synopsys® and Cadence® tools with a set of synthesis scripts 
  • Simulation support for Mentor Graphics® and Cadence® tools with a set of scripts and macros 
  • Extensive VHDL/Verilog 2001 test bench 
  • Documentation
  • 30 days of technical support 
  • 90 days of warranty against defects

Delivery Options

  • EDIF netlist for FPGA and low volume production 
  • EASE-8051 - a complete application debugging solution
  • Evaluation system for proprietary EB5-Tiny board
  • One-year maintenance 
  • On-site support and training

Downloads

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