CAST Processor IP Offerings Grow with New DSP and Z80-Compatible Cores

March 13, 2001, DATE, Munich, Germany - Semiconductor intellectual property (IP) provider CAST, Inc. and its development partner Evatronix S.A. today announced the release of two new synthesizable cores for electronic design:

the C32025 digital signal processing core, compatible with the Texas Instruments™ TMS320C25 DSP, and the CZ80CPU processor core, compatible with the popular Zilog™ Z80 8-bit microprocessor. Both cores are immediately available and are being demonstrated at the DATE conference in Munich. Different configurations and licensing options are available. Pricing is competitive; U.S. prices start at about $20,000 for the C32025 and $16,000 for the CZ80CPU.

About the C32025 DSP Core

The C32025 is a 16-bit, fixed-point digital signal processor that combines the flexibility of a high-speed controller with the numerical capability of an array processor. Fully compatible with the design-proven TMS320C25 chip, it has achieved speeds up to 42.6 MHz in FPGA implementations (Xilinx Virtex XCV200E-8).

"Embedded DSPs are the cornerstone of many exciting new product designs," said Wojtek Sakowski, vice president of Evatronix. "Our C32025 core matches the popular Texas Instruments™ chip while offering both excellent performance and HDL flexibility."

About the CZ80CPU Processor Core

Intended as an embedded controller within new system-on-chip (SoC) designs or for obsolete part replacement, the CZ80CPU is designed to be technology- and vendor-independent. It can run up to 80 MHz on a typical 0.5 micron process, and it synthesizes to less than 8,000 gates, depending on the technology.

"Designers are finding that integrating processor cores like our new CZ80CPU into SoC ASICs or FPGAs is a great solution for many common applications," said Hal Barbour, president of CAST. "More powerful processors are often overkill, and they're more expensive and require complicated licensing and royalty conditions. The CZ80CPU and our other 8- and 16-bit cores with their flexible control features and proven technology are often the perfect answer."

Development, Testing, and Deliverables

Both cores are fully synchronous, and follow other common guidelines for maximum reusability. Each has been thoroughly tested-including hardware verification comparing the original physical chips to the cores using a hardware modeler-and are delivered complete and ready to use, with technical documentation, test bench, test suite, synthesis scripts, and other design information. Custom modifications such as peripheral extensions are available.