Evatronix Adds 6502 and 80186XL ISA-compliant IP Cores to Its Portfolio.

Bielsko-Biala & Gliwice, Poland, July 7th, 2008 – Evatronix SA, a Silicon Intellectual Property (IP) provider, has announced today its newest products: C80186XL and C6502 soft IP cores. They aim at original chip replacement applications and therefore significant effort was undertaken to achieve the degree of reliability that guarantees trouble-free porting of the existing software to FPGA or ASIC based core implementations.

The C6502 IP core can be distinguished by its extreme efficiency - it takes as little as 2.4K gates at 79MHz when area optimized and 3.2K gates at 177MHz when speed optimized for ASIC technology. FPGA speed optimized implementations of the C6502 require no more than 390 slices in Xilinx FPGAs, while area optimized ones require slightly more than 300 slices.

The C80186XL is a high performance 16-bit microprocessor IP core designed to be a pin replacement of Intel 80c186xl chip. The core implements the same widely known instruction set as its chip predecessor, as well as an identical set of peripherals – Timer and Refresh Control Units, two independent DMA channels. The architecture, which derives from the speed-optimized C80186TX design, allows fast development of other 80186-compliant IP cores that would replace the following chips: 80c186ea, 80c186ec by Intel or AM186ER, AM186ED, AM186ES by AMD.

Both designs are strictly synchronous with a synchronous reset and no internal tri-states. The provided set of functional inputs, outputs and control signals make creation of a pin compatible device a straightforward task. The cores are also an appealing solution for low volume applications; the C80186XL can be easily implemented into the inexpensive Altera device (Cyclone III EP3C16).

“C80186XL and C6502 fit perfectly into our idea of providing industry with high quality parts replacements, ” said Wojciech Sakowski, Evatronix President.“There are still a significant number of companies relying on solutions developed some time ago. The fact that they now have a possibility to license our IP and develop ASICs or FPGA enhances their supply chain management.”

“We managed to reflect the chip functionality by using our own hardware modelling technology, the Personal Hardware Modeller, for the functional reverse engineering that is usually required to overcome ambiguities of the original documentation and to implement the undocumented features,” said Sebastian Kaprowski, product line manager. “Our PHM is interfaced directly to ModelSim environment, thus enabling the developed IP to be checked for full original chip functionality as both software (code) and hardware (programmed FPGA) in interaction with different peripherals.”

Evatronix’ broad line of its off-the-shelf IP cores equivalent to obsolete chips cover the following processors: 8-bit Zilog Z80, 16-bit Motorola 68000, Intel ® 80187 and 80387 numeric coprocessors as well as clones of the digital signal processors once manufactured by TI (32025) and Motorola (56000). These cores have been used in numerous projects in such application areas as telecommunication, military electronics and industrial automation. All Evatronix IP cores, including C80186XL and C6502, are technology independent and therefore can be implemented in any ASIC or FPGA technology.

Evatronix obsolete parts replacement services may include not only code development, but also in-system testing and delivery of FPGA-based adapters compatible to the original chip sockets. Thanks to alliances with third parties for backend design and chip manufacturing, Evatronix may also commit to deliver a larger volume of the required chips based on ASIC implementation.

Availability and customization options