Bielsko-Biala/Poland, August 9th, 2010 - The silicon intellectual property (IP) provider, Evatronix SA, today announced its presence at the series of EDA Tech Forum events hosted in Hsin-Chu, Taiwan on August 24th, Shanghai and Beijing, China on August 31st and September 2nd, respectively. During these selected shows, Evatronix will unveil its latest IP improvements in the hottest design areas of the semiconductor industry – USB 3.0, NAND Flash and SD memory, and multimedia.
The EDA Tech Forum events feature industry’s most influential experts and highest ranked officers from EDA tools manufacturers. Taiwanese and Chinese events will feature keynote from Mentor Graphics CEO Wally Rhines, and VIP speakers representing key market players, like TSMC and others.
"For users of EDA tools, the workflow can be significantly reduced by implementation of verified, tested and silicon-proven IP," said Michal Jedrak, Technical Marketing Manager at Evatronix. “With extensive test benches, TLM models for selected cores, standardized development environments and hardware evaluation boards, we provide complete and proven solutions that cut SoC development time by significant degree.”
"F The EDA Tech Forum events are strongly focused on presenting SoC designers with the best solutions for their job," said Evelyn Chen, the Regional Marketing Manager of Mentor Graphics. “ Naturally, the presence of IP providers like Evatronix helps us embrace the spectrum of their interests even better."