Evatronix Boosts the Performance of Its ONFi NAND Flash Memory Controller IP

Major performance enhancements to both the controller and its BCH engine guarantee seamless operation on the fastest memories.

Bielsko-Biala/Poland, March 16th, 2011 - Evatronix SA, the provider of robust memory controller IP, have announced today the latest generation of the NAND Flash controller IP core with significant performance improvements over the previous versions of the IP. The Evatronix NAND Flash controller will now provide application designers with a set of features aimed at even better support for High-Speed ONFi memories and an up to 64-bit configurable BCH engine for on-the-fly error correction at the highest available frequencies. Development of applications is further facilitated by the complementary software driver that supports Flash Transaction Layers (FTL) from Windows and Linux as well as HCC Embedded.

“Both performance and error correction capability are key factors for high-end memory applications, like NAND Flash,” said Arkadiusz Buchalik, Memory Controllers Product Line Manager at Evatronix. “The fifth generation of our core provides support for memories running at speeds of 200 MT/s, with efficient and smooth error correction at all available frequencies thanks to the new optimized BCH module.”

All the additional features of the NAND Flash Controller were designed to increase the efficiency of the core. Multipage transfers and hardware acceleration for bad block management reduce software overhead, while the optional encryption engine based on AES-256 is perfectly suited to protect vital data stored in the NAND Flash memory against unauthorized access.

Multitasking capability and parallel operations of the BCH engine increase the overall error correction performance. Dividing the algorithm stages into two separate domains facilitates a better balance of the execution time for each stage.

EVATRONIX NAND FLASH CONTROLLER IP AVAILABILITY

The Evatronix NANDFLASH-CTRL IP is available now for implementations in both ASIC and FPGA technologies. The BCH engine can be delivered with correction strength of any even value combination in the range from 2 to 64 bit.