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Evatronix to Discuss Multi-configuration Challenges in IP Design at the D&R IP-SoC Day in Tel-Aviv

Provider of highly configurable IPs shares its experience on different IP customization techniques, from parameter-based to software-generated IP.

Bielsko-Biala/Poland, March 30th, 2011 - Evatronix SA, the leading provider of configurable IP cores for 8051, USB and NAND Flash controllers, announced today the presentation on multi-configuration challenges in IP design and delivery that will be held on April 6th during the Design&Reuse IP-SoC Day event in Tel-Aviv, Israel. The speech will discuss various methodologies for the IP configurability, such as the parameter based approach, in-code proprietary pragmas configuration and fully software generated synthesizable RTL codes. Evatronix will explain advantages and drawbacks of the presented methods from both developer and user perspectives.

“IP configurability is the key factor when it comes to meeting application requirements, building competitive advantage and accelerating time-to-market – all three being essential parts of design success,” said Michal Jedrak, Technical Marketing Manager at Evatronix. “By offering different techniques for IP configuration, we facilitate this crucial part of the SoC design as much as possible."

An Evatronix representative will be available for discussion at the D&R IP SoC Day and also during the Tech Design Forum that will take place in Ceasarea, Israel, 5 days later on April 11th. Please contact us directly to set up a meeting at your premises around this timeframe.

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